How the RISC-V architecture’s inherent traits align with the demands of functional safety standards like ISO 26262.
A new technical paper titled “Optimizing Energy Efficiency in Subthreshold RISC-V Cores” was published by researchers at Norwegian University of Science and Technology (NTNU). Abstract “Our goal in ...
IIT Madras and ISRO developed and tested the SHAKTI-based IRIS chip for aerospace applications, promoting indigenized ...
IIT Madras and ISRO have collaboratively developed the SHAKTI microprocessor for space applications. This indigenous chip, based on RISC-V architecture and backed by the Ministry of Electronics, aims ...
A joint effort with ISRO Inertial Systems Unit, Thiruvananthapuram, the chip was manufactured at Semiconductor Laboratory ...
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