DatacenterDynamics2d
Axelera AI launches inferencing chiplet, supported by funding from EU's RISC-V project
AI hardware startup Axelera AI has unveiled its Titania AI inference chiplet. The company announced the hardware following a ...
The Register on MSN3d
Do you DARE? Europe bets once again on RISC-V for supercomputing sovereignty
A 38-strong group of tech players have founded a project with the snappy name Digital Autonomy with RISC-V in Europe, aka ...
Liliputing2d
Orange Pi RV2 is a single-board PC with an 8-core RISC-V processor
Last year Orange Pi introduced its first single-board computer with a quad-core RISC-V processor. Now the company is ready ...
CNX Software3d
ESP32-C6 is the first RISC-V microcontroller to achieve PSA Level 2 security compliance
Espressif ESP32-C6 RISC-V wireless microcontroller is now PSA Level 2 certified for improved IoT security, and IoT ...
RISC-V chips for a digitally autonomous EU: 240 million euros for DARE SGA1
The "Digital Autonomy with RISC-V in Europe" (DARE) project brings together 38 partner companies and research institutes to ...
Design-Reuse4d
5-stage pipeline core RISC-V processor
and to memory-mapped I/O blocks connected to AHB and APB buses. The application diagram shows that the processor AHB buses connect as masters to an AHB multilayer matrix, along with a DMA controller ...
Startup claims its Zeus GPU is 10X faster than Nvidia's RTX 5090
However, the RTX 5090 dominates in AI workloads with its 105 FP16 TFLOPS and 1,637 INT8 TFLOPS compared to 10 FP16 TFLOPS and 614 INT8 TFLOPS offered by single-chiplet Zeus. If Zeus could do ...
Design-Reuse4d
2-stage pipeline RISC-V processor core
IQonIC Works RV32EC_P2 Core is a 2-stage pipeline RISC-V processor core, designed to meet the needs of small, low-power embedded applications, running only trusted firmware. The processor interfaces ...
TMCnet3h
Untether AI Dramatically Expands AI Model Support and Speeds Developer Velocity with New Generative Compiler Technology
"This new compiler technology provides the ultimate in productivity and flexibility," said Alex Grbic, PhD and VP of Software Engineering at Untether AI. "By introducing our generative compiler ...
Codasip Selected To Design A High-End RISC-V Processor For The EU-Funded DARE Project
Europe's RISC-V leader to provide a customizable general-purpose processor for the €240M initiative Munich, Germany, 6 March 2025–Codasip, the Eur ...
Le Lézard4d
LDRA Joins Microchip's Mi-V Ecosystem, Expanding Functional Safety and Security Support for the RISC-V® Architecture
LDRA, a leader in automated software verification, traceability and standards compliance for 50 years, today announced it has joined Microchip's Mi-V ecosystem by adding support for PolarFire® SoC ...